1. Technical Field
This invention generally relates to semiconductor devices, and more specifically relates to semiconductor memory devices.
2. Background Art
The proliferation of electronics in our modern world is in large part due to integrated circuit semiconductor devices. Integrated semiconductor devices are designed and used in almost every electronic device today. In many applications power consumption is a critical issue for several reasons. For example, in portable devices such as wireless telephones, battery life and battery size are primary design concerns. Consumers want the portable electronic device to run as long as possible using a single battery charge and also want the device, including the battery to be as small and portable as possible. Thus, it is strongly desirable to be able to decrease power consumption of the device such that battery life can be extended and/or the size of the battery decreased.
In other applications power consumption is critical because it is directly related to the amount of heat generated by a device. A semiconductor device that consumes more power will generate more heat. In applications where heat sensitivity is a critical factor, reducing the power consumption reduces the heat generated by the device.
In many applications the power consumption of the device memory is a significant issue. For example, devices such as phones, pagers and palmtop computers all use various amounts of memory in which memory power consumption is a significant factor. In these systems it is desirable to use memory architectures and supporting circuitry that minimize power consumption. Unfortunately, many of the low power memory systems used today suffer from significant drawbacks, such as relatively large size or insufficient performance. Therefore, what is needed is a memory system that minimizes power consumption, minimizes device size while providing acceptable memory performance.
According to the present invention, a device and method is provided that reduces power consumption in memory devices. The present invention provides a sense amplifier that reduces power consumption while providing high performance. In the preferred embodiment of the present invention, the sense amplifier comprises a bi-directional differential sense amp that is configurable for use on low power devices. The bi-directional sense amp allows the same sense amp to be used for both read and write operations on the memory cells. The preferred embodiment sense amp facilitates the use of differential data buses, further reducing power consumption while providing high performance. Thus, the preferred embodiment bi-directional differential sense amp reduces the device size and complexity, reducing power consumption while providing high performance memory access.
The foregoing and other features and advantages of the invention will be apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings.